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Nineteenth Annual IEEE Symposium on

Logic in Computer Science (LICS 2004)

Paper: Multi-Clock Timed Networks (at LICS 2004)

Authors: Parosh A. Abdulla Johann Deneux Pritha Mahata

Abstract

We consider verification of safety properties for parameterized systems of timed processes, so called timed networks. A timed network consists of a finite state process, called a controller, and an arbitrary set of identical timed processes. In a previous work, we showed that checking safety properties is decidable in the case where each timed process is equipped with a single real-valued clock. It was left open whether the result could be extended to multi-clock timed networks. We show that the problem becomes undecidable when each timed process has two clocks. On the other hand, we show that the problem is decidable when clocks range over a discrete time domain. This decidability result holds when processes have any finite number of clocks.

BibTeX

  @InProceedings{AbdullaDeneuxMahata-MultiClockTimedNetw,
    author = 	 {Parosh A. Abdulla and Johann Deneux and Pritha Mahata},
    title = 	 {Multi-Clock Timed Networks},
    booktitle =  {Proceedings of the Nineteenth Annual IEEE Symposium on Logic in Computer Science (LICS 2004)},
    year =	 {2004},
    month =	 {July}, 
    pages =      {345--354},
    location =   {Turku, Finland}, 
    publisher =	 {IEEE Computer Society Press}
  }
   

Last modified: 2017-04-0512:37
Andrzej Murawski